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| U.S. Patent
No. 5,539,778 |
| Kvaser CAN Pages, CAN Introduction |
Reception
comparator
- INVENTORS: Kienzler; Rainer, Reutlingen, Federal Republic of Germany; Fleischer; Ulrich,
Pliezhausen, Federal Republic of Germany; Elbracht; Berthold, Reutlingen, Federal Republic
of Germany;
- ASSIGNEES:Robert Bosch GmbH, Stuttgart, Federal Republic of Germany
- ISSUED: July 23, 1996
- FILED: Sep. 16, 1993
Abstract
A receiving comparator for a data-transmission system comprising at least one control
unit and data-transmission lines, in particular for at least one Controller Area Network
(CAN) controller and one CAN bus system having a CAN bus (CB) is proposed, which is
distinguished by the feature that the individual circuit elements are monolithically
integrated. By generating a switching threshold which is independent of the operating
voltage and temperature with the aid of a current source (IS), one prevents the CAN bus
potentials from being asymmetrically influenced. The arrangement guarantees a processing
of digital signals with a high data rate, whereby the input common-mode range extends up
to above the supply voltage and to below ground.
First Claim
1. A receiving comparator for a data-transmission system having at least one control
unit and at least one data-transmission line, the receiving comparator comprising:
- a signal conditioning device having an input for connection to the at least one
data-transmission line, the signal conditioning device including an input divider for
adjusting input potentials from the at least one data-transmission line;
- a comparator circuit, coupled to the signal conditioning device and having a
threshold-value generating device, the input divider including a reference-voltage source
whose potential is selected to provide input signals to the comparator circuit which lie
within a supply band;
- a signal-amplifier stage coupled to the comparator circuit; and an output stage coupled
to the signal-amplifier stage; wherein the signal conditioning device, comparator circuit,
signal amplifier stage, and output stage are monolithically integrated.
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